Kioxia’s Epic Turnaround: Surging Over 50-Fold in 18 Months
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Kioxia’s Epic Turnaround: Surging Over 50-Fold in 18 Months
Not only has it achieved a successful turnaround, but it has also experienced dual explosive growth in both the capital market and technology.
Navigating Web3 tides with focused insightsAuthor: Du Qin (DQ)
Earlier, in an article, we conducted an in-depth analysis of this flash memory giant’s regrettable low point: burdened by Toshiba Memory’s former glory yet “born at the wrong time”; cold-shouldered by capital markets, resulting in a last-minute IPO setback; suffering consecutive massive losses amid an industry winter and unfortunately missing out on the enormous opportunity presented by HBM—while even its alliance with Western Digital failed to deliver results… At that time, Kioxia appeared to outsiders as a “hot potato” amid the semiconductor industry’s sweeping reshuffle.
Yet barely over a year later, Kioxia staged a truly epic comeback. Fueled by the explosive growth of AI large models, the market logic for memory has undergone a fundamental shift—and Kioxia not only achieved a dramatic turnaround but also delivered a dual breakthrough in both capital markets and technology.
Kioxia’s stock price performance since listing
A Capital Market Super Myth
Kioxia successfully listed on the Tokyo Stock Exchange at the end of 2024, with an initial market capitalization hovering around ¥800 billion (approximately USD 5 billion). However, propelled by the explosive surge in AI-driven memory demand, Kioxia pulled off an epic reversal within 18 months of listing: its share price soared more than 50-fold over that period—rising eightfold alone in 2026.
Today, Kioxia’s market cap has surpassed ¥51 trillion (approximately KRW 481 trillion), repeatedly overtaking Toyota Motor—the emblem of Japanese manufacturing—to become the most valuable company on the Japanese stock exchange.
According to Kioxia’s preliminary financial guidance for Q1 FY2026 (April–June), its single-quarter operating profit is expected to reach ¥1.3 trillion (approximately USD 8.1 billion), representing nearly a 30-fold year-on-year increase; net profit guidance stands at ¥869 billion, up 48-fold year-on-year—surpassing the full-year FY2025 net profit forecast in just one quarter.
With major customers rushing to sign long-term supply contracts, Kioxia’s NAND production capacity for FY2026 is fully booked, and the supply shortage is expected to persist through FY2027. Market expectations project Kioxia’s operating margin for this year will exceed 60%, setting a new global high for profitability in the memory industry. Furthermore, as investors anticipate shareholder returns—including stock splits and dividends—the target share price is projected to climb to ¥200,000.
This surge has delivered unimaginable investment returns to Kioxia’s parent company Bain Capital—and indirect major shareholder SK hynix—who held firm during the company’s darkest days.
According to the Financial Times, the AI boom has transformed Bain Capital’s 2018 acquisition of Toshiba Memory (now Kioxia) into one of the most profitable private equity deals in history. Bain has already realized profits from selling the majority of its stake—exceeding USD 15 billion—with a nearly 20x return; its flagship private equity fund is estimated to have generated over USD 8 billion in profit.
In 2018, SK hynix invested a total of ¥395 billion (then approximately KRW 3.9 trillion) in Toshiba Memory via Korean-U.S.-Japanese consortium arrangements. The consortium still holds an 18% stake in Kioxia. With Kioxia’s soaring stock price, SK hynix has reaped substantial paper gains, and market expectations suggest the consortium’s ultimate profit could far exceed USD 70 billion.
The former “hot potato” has instantly become a “super ATM.”
Historically, AI dividends have primarily accrued to GPU and HBM companies such as NVIDIA and SK hynix. While HBM shines on the AI training side, NAND has emerged as a scarce resource across AI inference, model storage, data lakes, enterprise SSDs, and nearline storage. Market forecasts project Kioxia’s FY2027 net profit will reach ¥2.8389 trillion—a 5.1x increase over the prior year.
3D NAND: Kioxia’s Core Competency
Kioxia invented NAND flash memory over 35 years ago. In 2007, Kioxia launched BiCS FLASH 3D flash memory—a comprehensive 3D flash technology platform built around vertical stacking, lateral scaling, wafer bonding, select-gate optimization, and advanced packaging.
The fundamental idea behind 3D NAND differs from 2D NAND: instead of shrinking memory cells only laterally on a plane, it stacks them vertically—like building skyscrapers. Kioxia’s analogy is vivid: previously, it was a single-story building constrained by limited land area; 3D NAND transforms it into a multi-story apartment complex, accommodating more “residents” per unit area.
At the heart of BiCS FLASH lies its batch-processing fabrication technology. Its general process flow is as follows: first, alternately stack plate-shaped electrodes and insulating layers; then simultaneously drill numerous vertical holes; next, fill these holes with charge-storage films and columnar electrodes; finally, each intersection between plate-shaped and columnar electrodes forms a memory cell. This reveals that Kioxia’s BiCS FLASH does not fabricate memory cells layer-by-layer in the conventional sense. Instead, it first constructs the structural framework and then uses a “punch-and-plug” approach to simultaneously penetrate multiple layers and form memory cells. As layer count increases, manufacturing cost does not rise linearly—enhancing the economic viability of further stacking.
Kioxia’s official disclosure outlines the commercialization timeline of BiCS FLASH as follows: 48-layer BiCS FLASH entered mass production in 2015, followed by 96-layer, 112-layer, and 162-layer generations; as of March 2023, stacking exceeding 200 layers had been achieved.
Among these, the 8th-generation BiCS FLASH represents a critical milestone. Kioxia states that this generation employs 218-word-line stacking, achieving a 1Tb TLC product storage density of 18.3 Gb/mm², supporting 3.2 Gbps external data transfer speeds, 40 µs read latency, and 205 MB/s program throughput.
The 8th-generation BiCS FLASH isn’t merely about increasing layers—from 162 to 218—but also introduces two key technologies:
CBA (CMOS Directly Bonded to Array): CBA can be understood as separately fabricating peripheral CMOS control circuits and memory arrays, then bonding the wafers together. Traditionally, CMOS circuits and memory arrays were manufactured on the same wafer. However, their optimal process conditions differ: memory arrays require processes suited for charge storage and stacking structures, while CMOS circuits prioritize logic control, electrical performance, and speed. Integrating them on a single wafer forces compromises.
CBA’s approach is to fabricate the CMOS wafer and memory array wafer independently—each optimized for its specific purpose—then bond them together with high precision. Benefits include higher bit density, faster NAND I/O speeds, enabling memory arrays to adopt high-temperature processes previously impractical due to CMOS constraints, and reduced electrical interference between adjacent memory cells.
OPS (On-Pitch Select Gate): OPS addresses wasted space inside memory arrays. Traditional architectures include non-data-storing “dummy” regions between memory cells—areas consuming die area without contributing capacity. Kioxia’s OPS technology reconfigures select-gate and insulation isolation structures to minimize or eliminate these inefficient zones, packing more functional memory cells into the same area. According to Kioxia’s official explanation, OPS removes unnecessary dummy regions, allowing more actual memory cells to fit within identical physical space—significantly boosting storage density.
The 9th-generation BiCS FLASH targets 512Gb and 1Tb TLC products, focusing on mid-to-low capacity applications demanding high performance and low power consumption. It continues leveraging CBA and OPS technologies to improve manufacturing efficiency and deliver more advanced flash solutions. Rather than pursuing further layer-count increases, the 9th generation emphasizes balanced improvements across performance, power efficiency, cost, and production yield.
By contrast, the 10th-generation BiCS FLASH clearly prioritizes future high-capacity, high-performance requirements. Kioxia states that the 10th generation retains the same CMOS technology as the 9th generation while expanding stack height to 332 layers—approximately 1.5x that of the 8th generation—to boost bit density and power efficiency.
Beyond front-end process technology, Kioxia is also advancing back-end packaging capabilities. Official documentation notes Kioxia’s development of an 8TB monolithic flash package—achieved by stacking 32 dies (each 2 Tb) within a single package. This relies on advanced back-end processes including wafer thinning, materials engineering, and wire bonding. Such 32-die stacking enables integration of 32 × 2 Tb dies into a package under 2 mm tall, delivering an 8TB flash solution.
From 3D NAND to 3D DRAM: Kioxia’s New Bet
Kioxia is also deploying a secret weapon to break through the “pure NAND vendor” single-product-line barrier. So why is Kioxia developing 3D DRAM? Because DRAM, like NAND before it, has hit similar planar scaling bottlenecks—and as a veteran in 3D NAND, Kioxia possesses verified process advantages.
Continuing to shrink traditional DRAM faces several challenges: storage capacitors become increasingly difficult to scale down; access transistor leakage rises; data retention time shortens; refresh frequency increases; and larger capacities incur higher refresh power consumption. imec noted in a technical review that the conventional 1T1C DRAM structure faces scaling, cost, and power-efficiency challenges—particularly large capacitors limiting 3D integration pathways, while smaller transistors exhibit more pronounced leakage paths, driving up refresh power.
In December 2024, Kioxia announced development of OCTRAM (Oxide-Semiconductor Channel Transistor DRAM)—a novel 4F² DRAM composed of oxide-semiconductor transistors, offering both high on-current and ultra-low off-current. This achievement was co-developed by Kioxia and Nanya Technology and presented at the 2024 IEEE IEDM.
OCTRAM overview (Source: Kioxia; same below)
Conventional DRAM cells typically use a 1T1C architecture—one access transistor plus one capacitor. Its limitations are clear: as cells shrink further, capacitors become harder to fabricate, and transistor leakage raises refresh power consumption. Kioxia’s OCTRAM aims to reduce leakage using InGaZnO transistors and push cell density higher.
Cross-sectional TEM image of InGaZnO vertical transistor
InGaZnO transistors theoretically enable both ultra-low leakage and high on-current due to their wide bandgap and high electron mobility. By optimizing contact electrode materials and spacer thickness, Kioxia experimentally achieved >15 µA on-current alongside sub-10⁻¹⁸ A off-current (as shown below). A significant portion of DRAM power consumption stems from refresh operations. Lower leakage extends data retention time and reduces refresh pressure. Thus, OCTRAM’s core value lies in using low-leakage oxide-semiconductor transistors to lower DRAM refresh power.
(a) On-current characteristics and (b) off-current characteristics of the developed InGaZnO transistor
In September 2025, Kioxia disclosed additional OCTRAM reliability research, focusing on TDDB (Time-Dependent Dielectric Breakdown) lifetime for sub-25 nm Gate-All-Around vertical InGaZnO transistors. TDDB refers to gradual degradation and eventual failure of transistor gate dielectrics under prolonged electric-field stress. Kioxia identified two root causes of lifetime degradation: intrinsic factors arising from dimensional scaling, and extrinsic factors introduced by manufacturing processes. By optimizing fabrication processes to mitigate extrinsic degradation, Kioxia achieved a projected TDDB lifetime exceeding 10 years.
In December 2025, Kioxia announced a more pivotal advancement toward 3D DRAM: development of highly stackable oxide-semiconductor channel transistors—successfully fabricating an 8-layer horizontal transistor stack delivering >30 µA on-current and <1 aA (i.e., 10⁻¹⁸ A) off-current.
To date, Kioxia’s 3D DRAM remains in the cutting-edge R&D phase—not yet a commercialized product.
Though not a traditional DRAM giant, Kioxia’s accumulated expertise in 3D NAND—stacking processes, materials integration, and array fabrication—may provide a unique entry point into next-generation 3D DRAM exploration. Semiconductor Engineering has analyzed that Kioxia’s 3D DRAM path leverages mature oxide/nitride stacking capabilities from NAND to achieve lower-cost bit scaling, then replaces the channel material with IGZO to mitigate thermal degradation issues.
However, one crucial point must be emphasized: Kioxia’s 3D DRAM is not HBM. HBM is a package-level 3D integration—it stacks pre-fabricated DRAM dies to address high-bandwidth needs adjacent to GPUs. Kioxia’s 3D DRAM is device/cell-level 3D integration, aiming to solve fundamental scaling limits of DRAM cells themselves. Thus, Kioxia isn’t directly chasing HBM but exploring a deeper, device-level 3D DRAM pathway. If successful, this route could open a new technical branch for high-capacity, low-power working memory in the AI era.
Although 3D DRAM remains distant from commercialization, it currently functions more as a forward-looking technological “ticket”—not an immediate revenue contributor. Yet for Kioxia, this ticket carries substantial strategic significance. In the short term, Kioxia benefits from AI-driven NAND recovery; mid-term, it advances high-layer BiCS FLASH; long-term, it bets on 3D DRAM—extending its 3D stacking capability from NAND into DRAM.
Conclusion
From massive losses and merger stalemates to becoming Japan’s most valuable company in 2026—surpassing Toyota—Kioxia’s roller-coaster trajectory encapsulates the brutal yet captivating nature of the semiconductor memory industry. Once sidelined by capital markets due to narrow product lines and missed HBM opportunities, Kioxia seized its golden era amid the “tsunami of massive data flows” unleashed by AI large models—anchored firmly in its steadfast commitment to NAND flash.
Kioxia’s comeback may not yet signal Japan’s full semiconductor revival. But it does prove one thing: in the semiconductor industry, troughs don’t inevitably lead to exit. As long as technological assets remain intact, realignments of cycles, capital, and demand can instantly restore a forgotten company to center stage.
For Kioxia, the challenge ahead lies in striking a sustainable balance between frenzied capital enthusiasm and the unforgiving rhythms of industrial cycles. That equilibrium will determine whether this lone beacon of Japanese semiconductor revival—carrying hopes of national resurgence—is merely a fleeting bloom within the AI super-cycle—or the true genesis of a new memory empire.
*Disclaimer: This article is original content authored by the writer. The views expressed herein represent the author’s personal opinions. Semiconductor Industry Review republishes this article solely to present an alternative perspective; it does not endorse or support this viewpoint. Should you hold any objections, please contact Semiconductor Industry Review directly.
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